Core Tests

Workflow runs for Core Tests

• Merge pull request #62 from night1rider/reg-32bit

  completed successfully:
  Core Tests#139:Commitf53af6cpushedbyAlexLanzano
  main

  Nov 9, 202612s
  More actions for workflow run 139

• [spimem, flash, cadence_ospi, versal2, test] Add a SPI memory type with Cadence OSPI and NOR flash drivers

  completed successfully:
  Core Tests#138:Pull request#64synchronizebynight1rider
  night1rider:spimem-flash

  Nov 6, 202612s
  More actions for workflow run 138

• [uart, pl011, versal2, test] Add an Arm PL011 UART driver

  completed successfully:
  Core Tests#137:Pull request#63synchronizebynight1rider
  night1rider:pl011-uart

  Nov 6, 202611s
  More actions for workflow run 137

• [reg, test] Use 32-bit register accesses on all targets

  completed successfully:
  Core Tests#136:Pull request#62synchronizebynight1rider
  night1rider:reg-32bit

  Nov 6, 202611s
  More actions for workflow run 136

• [reg, test] Use 32-bit register accesses on all targets

  completed successfully:
  Core Tests#135:Pull request#62synchronizebynight1rider
  night1rider:reg-32bit

  Nov 5, 20269s
  More actions for workflow run 135

• [uart, pl011, versal2, test] Add an Arm PL011 UART driver

  completed successfully:
  Core Tests#134:Pull request#63synchronizebynight1rider
  night1rider:pl011-uart

  Nov 5, 202613s
  More actions for workflow run 134

• [spimem, flash, cadence_ospi, versal2, test] Add a SPI memory type with Cadence OSPI and NOR flash drivers

  completed successfully:
  Core Tests#133:Pull request#64synchronizebynight1rider
  night1rider:spimem-flash

  Nov 5, 202612s
  More actions for workflow run 133

• Merge pull request #61 from AlexLanzano/spi-nor-rename

  completed successfully:
  Core Tests#132:Commite2e1b93pushedbyaidangarske
  main

  Nov 5, 20261m 58s
  More actions for workflow run 132

• [reg, test] Use 32-bit register accesses on all targets

  completed successfully:
  Core Tests#131:Pull request#62synchronizebynight1rider
  night1rider:reg-32bit

  Nov 5, 202610s
  More actions for workflow run 131

• [spimem, flash, cadence_ospi, versal2, test] Add a SPI memory type with Cadence OSPI and NOR flash drivers

  completed successfully:
  Core Tests#130:Pull request#64synchronizebynight1rider
  night1rider:spimem-flash

  Nov 5, 202623s
  More actions for workflow run 130

• [uart, pl011, versal2, test] Add an Arm PL011 UART driver

  completed successfully:
  Core Tests#129:Pull request#63synchronizebynight1rider
  night1rider:pl011-uart

  Nov 5, 20269s
  More actions for workflow run 129

• [spimem, flash, cadence_ospi, versal2, test] Add a SPI memory type with Cadence OSPI and NOR flash drivers

  completed successfully:
  Core Tests#128:Pull request#64synchronizebynight1rider
  night1rider:spimem-flash

  Nov 5, 202612s
  More actions for workflow run 128

• [reg, test] Use 32-bit register accesses on all targets

  completed successfully:
  Core Tests#127:Pull request#62synchronizebynight1rider
  night1rider:reg-32bit

  Nov 5, 202611s
  More actions for workflow run 127

• [uart, pl011, versal2, test] Add an Arm PL011 UART driver

  completed successfully:
  Core Tests#126:Pull request#63synchronizebynight1rider
  night1rider:pl011-uart

  Nov 5, 202610s
  More actions for workflow run 126

• [spimem, flash, cadence_ospi, versal2, test] Add a SPI memory type with Cadence OSPI and NOR flash drivers

  completed successfully:
  Core Tests#125:Pull request#64openedbynight1rider
  night1rider:spimem-flash

  Nov 5, 202613s
  More actions for workflow run 125

• [uart, pl011, versal2, test] Add an Arm PL011 UART driver

  completed successfully:
  Core Tests#124:Pull request#63openedbynight1rider
  night1rider:pl011-uart

  Nov 5, 202612s
  More actions for workflow run 124

• [reg, test] Use 32-bit register accesses on all targets

  completed successfully:
  Core Tests#123:Pull request#62openedbynight1rider
  night1rider:reg-32bit

  Nov 5, 202613s
  More actions for workflow run 123

• Rename SPI-NOR flash functions after datasheet commands and opcodes

  completed successfully:
  Core Tests#122:Pull request#61openedbyAlexLanzano
  AlexLanzano:spi-nor-rename

  Oct 29, 202610s
  More actions for workflow run 122

• Move WB0 board to NUCLEO-WB09KE, rework RCC, alias WB0 GPIO

  completed successfully:
  Core Tests#121:Pull request#60openedbyAlexLanzano
  AlexLanzano:stm32wb0

  Oct 23, 202610s
  More actions for workflow run 121

• Merge pull request #59 from AlexLanzano/bug-fixes2

  completed successfully:
  Core Tests#120:Commita1cfc5cpushedbyaidangarske
  main

  Oct 16, 202610s
  More actions for workflow run 120

• Bug fixes and test coverage

  completed successfully:
  Core Tests#119:Pull request#59synchronizebyAlexLanzano
  AlexLanzano:bug-fixes2

  Oct 16, 202612s
  More actions for workflow run 119

• Bug fixes and test coverage

  completed successfully:
  Core Tests#118:Pull request#59synchronizebyAlexLanzano
  AlexLanzano:bug-fixes2

  Oct 16, 20269s
  More actions for workflow run 118

• Bug fixes and test coverage

  completed successfully:
  Core Tests#117:Pull request#59synchronizebyAlexLanzano
  AlexLanzano:bug-fixes2

  Oct 14, 202610s
  More actions for workflow run 117

• Bug fixes and test coverage

  completed successfully:
  Core Tests#116:Pull request#59openedbyAlexLanzano
  AlexLanzano:bug-fixes2

  Oct 14, 202610s
  More actions for workflow run 116

• Merge pull request #57 from AlexLanzano/bug-fixes

  completed successfully:
  Core Tests#115:Commit9897729pushedbyaidangarske
  main

  Oct 8, 20269s
  More actions for workflow run 115