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Fix: memset TMR payload/slab buffers before orch starts - #2165

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yanghaoran29:feat/tmr-preamble-buf-memset
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Fix: memset TMR payload/slab buffers before orch starts#2165
yanghaoran29 wants to merge 1 commit into
hw-native-sys:mainfrom
yanghaoran29:feat/tmr-preamble-buf-memset

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@yanghaoran29

@yanghaoran29 yanghaoran29 commented Sep 8, 2026

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Summary

  • Move the cold first-touch memset of live payload_per_core_ / deferred_slab_per_core_ rows into TMR pre_handshake_init (A5 + a2a3), still before peers observe hs_setup_done_, so Orch can start without paying round-1 page-fault cost inside the Orch→Sched window.
  • assign_own_clusters still rewires fields on already-resident pages; deinit comments updated to match.

Test plan

  • Onboard A5: rebuild with the change, run TMR vector_example for 3 rounds under task-submit with device-wall STRACE enabled; compare against a clean main build of the same case.
  • Acceptance: round-1 SchedWindow.start − OrchWindow.start should collapse toward round-2+ levels (cold cost moves into setup before orch, not the Orch→Sched gap).
  • Observed on A5 with --rounds 3 (clean main vs this change): round-1 gap ~256 µs → ~0.6 µs; round-2+ gap stays on the order of a few µs (warm path; small flips vs Sched post-handshake race are expected once pages are resident).
  • a2a3: code mirrored only; no onboard validation on this change.

Move cold first-touch of payload_per_core_/deferred_slab_per_core_ into
pre_handshake_init so Orch→Sched start gap no longer absorbs round-1 page faults.
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coderabbitai Bot commented Sep 8, 2026

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Review Change StackReview Change Stack

No actionable comments were generated in the recent review. 🎉

ℹ️ Recent review info
⚙️ Run configuration

Configuration used: Organization UI

Review profile: CHILL

Plan: Advanced

Run ID: c4d68333-19d8-4ce7-89d9-fde32c8c7251

📥 Commits

Reviewing files that changed from the base of the PR and between 7bcdc95 and 5b3ef1d.

📒 Files selected for processing (2)
  • src/a2a3/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_cold_path.cpp
  • src/a5/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_cold_path.cpp

Included review availability: Your plan provides up to 1 included review per hour; 0 remain after this review.


📝 Walkthrough

Walkthrough

The A5 and a2a3 scheduler paths now first-touch and zero live per-core dispatch buffers during pre_handshake_init before handshake setup is published. The deinit() comments document this lifecycle.

Changes

Scheduler buffer initialization

Layer / File(s) Summary
Pre-handshake buffer zeroing
src/a2a3/.../scheduler/scheduler_cold_path.cpp, src/a5/.../scheduler/scheduler_cold_path.cpp
Both scheduler paths include <cstring>, zero live payload and deferred-slab rows before publishing hs_setup_done_, and update the deinit() comments to describe the new initialization lifecycle.

Priority: ⬇️ Low — Defer the scheduler first-touch optimization because it is a narrow cold-path performance change with no supplied customer or external urgency evidence.

Estimated code review effort: 2 (Simple) | ~10 minutes

Merge Risk: ⚪ Minimal · up to 5b3ef

This change moves first-touch buffer initialization ahead of scheduler handoff to remove cold-start latency without changing the later dispatch lifecycle. No merge-blocking risk is currently identified.

🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name Status Explanation Resolution
Docstring Coverage ⚠️ Warning Docstring coverage is 50.00% which is insufficient. The required threshold is 80.00%. Docstring coverage is scoped to functions touched by this diff. Analyzed 4 functions across 2 files. Write docstrings for the functions missing them to satisfy the coverage threshold.
✅ Passed checks (4 passed)
Check name Status Explanation
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.
Description check ✅ Passed The description clearly explains the relocation of the TMR buffer initialization, the affected paths, and the validation results. It is directly related to the changeset.
Title check ✅ Passed The title clearly summarizes the main change: zeroing the TMR payload and slab buffers before the orchestrator starts.
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I twitch my nose at buffers bright
Before the handshake wakes to light
Each core row is touched and clear
No tiny fault shall hop near
The scheduler starts with cheer

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@yanghaoran29
yanghaoran29 force-pushed the feat/tmr-preamble-buf-memset branch from d9e25af to 5b3ef1d Compare September 8, 2026 12:41
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