arch/risc-v/rp23xx-rv: Add SMP support for dual Hazard3#19026
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FYI: I restarted the CI Build to fix the Docker Image |
Working fine, a rearranged init process to be more like in the reference and disabled CDC buffering in config, will also update single core config, also reworked spinlock/critical section points while in app context and in ISR. |
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@shtirlic does this patch ready for review? |
Not yet, I am testing with complex firmware, involving heavy spi, i2c, lcd usage. All simple configs works fine. I have some problems with my custom drivers for PicoCalc board and trying to figure out are there bugs in my custom driver implementation or some more i2c or SPI work should be done to address SMP config, spinclock, races etc. |
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Add SMP support to rp23xx risc-v port Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
Summary
Add SMP support to rp23xx risc-v port
Changes
Todo
Zcmpci/docker: bump risc-v toolchain #19030Impact
SMP support should work utilizing 2 Hazard3 cores
Testing
ostest nsh output