floonoc sky130hd: fix PSM-0069 (row-0 VSS via blocked by IO-pin obstruction)#214
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Bottom-edge IO pins on met2 at edge_margin=5.0μm had their spacing-expanded obstruction (obs_yMax=5381nm) overlapping the row-0 VSS via area (y_min=5200nm). pdngen's Grid::makeVias silently dropped all row-0 met1×met4 via candidates as kObstructed — no PDN-0110 fires for obstruction removal — so the VSS stripe terminated short of row 0, leaving every cell in that row with VGND disconnected (PSM-0069). Fix: reduce edge_margin from 5.0→4.37μm (nearest valid met2 y-track below the 4.82μm threshold); obs_yMax drops to 4751nm, clearing the via area. _final passes with [INFO PSM-0040] All shapes on net VSS are connected. Documents root cause in CLAUDE.md known-bugs table and DECISIONS.md; updates debug-design skill with a PSM-0069 recognizer.
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Summary
edge_margin=5.0μm) had their spacing-expanded obstruction overlapping the row-0 VSS via area.pdngen'sGrid::makeViassilently dropped all row-0 via candidates — noPDN-0110fires for obstruction removal — so the VSS stripe terminated short of row 0, leaving every cell in that row with VGND disconnected (PSM-0069, 827 PSM-0039).edge_marginindesigns/sky130hd/floonoc/io.tclfrom5.0→4.37μm(nearest valid met2 y-track below the 4.82μm threshold). Once the obstruction clears, vias insert and the stripe reaches row 0 automatically._finalbuild passes with[INFO PSM-0040] All shapes on net VSS are connected.and no PSM-0038/PSM-0039/PSM-0069 in the final log.CLAUDE.mdknown-bugs table;debug-designskill updated with PSM-0069 recognizer;floonocDECISIONS.md sky130hd section updated to finishing.