Repository navigation
[bsp][esp32-s3] add ESP32-S3-DevKitM-1 support - #11844
cms19859230182-lang wants to merge 1 commit into
Conversation
|
👋 感谢您对 RT-Thread 的贡献!Thank you for your contribution to RT-Thread! 为确保代码符合 RT-Thread 的编码规范,请在你的仓库中执行以下步骤运行代码格式化工作流(如果格式化CI运行失败)。 🛠 操作步骤 | Steps
完成后,提交将自动更新至 如有问题欢迎联系我们,再次感谢您的贡献!💐 |
📌 Code Review Assignment🏷️ Tag: workflowReviewers: @Rbb666 @kurisaW @supperthomas Changed Files (Click to expand)
📊 Current Review Status (Last Updated: 2026-10-10 21:33 CST)
📝 Review Instructions
|
@cms19859230182-lang 编译还有点问题,相关的软件包依赖没有添加 |
好的,稍等一下,我回去就开始改。 |
等一下,这个bug我改好了,你引用的是我在21:36的commit。不过我在commit完以后就意识到了问题,所以我在21:52的时候就又commit了一份上去,你康康 |
3520458 to
16ecc10
Compare
There was a problem hiding this comment.
🔵 Needs a closer look
The low-level Xtensa port has unresolved interrupt and FreeRTOS compatibility defects and requires hardware-focused human review.
4 open findings
What changed in this PR
Adds initial single-core ESP32-S3-DevKitM-1 BSP support, including the Xtensa CPU port, ESP-IDF integration, board configuration, and CI tooling.
新增单核 ESP32-S3-DevKitM-1 BSP,包括 Xtensa CPU 移植、ESP-IDF 集成、板级配置及 CI 工具链支持。
Changes:
- Adds Xtensa vectors, context switching, startup, linker scripts, and ESP-IDF compatibility glue. / 新增 Xtensa 向量、上下文切换、启动代码、链接脚本及 ESP-IDF 兼容层。
- Configures UART0, GPIO, system tick, flashing images, and BSP documentation. / 配置 UART0、GPIO、系统节拍、烧录镜像及 BSP 文档。
- Registers the ESP32-S3 toolchain and BSP across CI workflows. / 在 CI 工作流中注册 ESP32-S3 工具链和 BSP。
| File | Description |
|---|---|
tools/ci/toolchain.sh |
Adds Xtensa toolchain download. / 新增工具链下载。 |
tools/ci/toolchain_bsp.yml |
Maps toolchain to BSP. / 映射工具链与 BSP。 |
tools/ci/bsp_detail.yml |
Registers BSP checks. / 注册 BSP 检查。 |
tools/ci/bsp_detail.py |
Adds toolchain URL. / 新增工具链地址。 |
libcpu/xtensa/SConscript |
Dispatches Xtensa CPU ports. / 分派 Xtensa CPU 端口。 |
libcpu/xtensa/esp32s3/SConscript |
Builds ESP32-S3 CPU sources. / 构建 CPU 源码。 |
libcpu/xtensa/esp32s3/cpuport.h |
Defines context-frame policy. / 定义上下文帧策略。 |
libcpu/xtensa/esp32s3/cpuport.c |
Implements stack, IRQ, and CPU glue. / 实现栈、中断及 CPU 适配。 |
libcpu/xtensa/esp32s3/context_gcc.S |
Implements vectors and context switching. / 实现向量与上下文切换。 |
bsp/ESP/libraries/drivers/sdkconfig.h |
Selects S3 SDK configuration. / 选择 S3 SDK 配置。 |
bsp/ESP/libraries/drivers/sdkconfig_s3.h |
Supplies ESP-IDF configuration. / 提供 ESP-IDF 配置。 |
bsp/ESP/libraries/drivers/Kconfig |
Adds S3 board options and pins. / 新增板型选项及引脚。 |
bsp/ESP/libraries/drivers/board.c |
Adapts tick and interrupt setup. / 适配节拍及中断设置。 |
bsp/ESP/ESP32_S3/.config |
Defines default BSP configuration. / 定义默认 BSP 配置。 |
bsp/ESP/ESP32_S3/SConstruct |
Defines the BSP build and image conversion. / 定义构建及镜像转换。 |
bsp/ESP/ESP32_S3/SConscript |
Collects BSP and wrapper groups. / 汇总 BSP 与包装层。 |
bsp/ESP/ESP32_S3/rtconfig.py |
Configures compiler and linker. / 配置编译器与链接器。 |
bsp/ESP/ESP32_S3/rtconfig.h |
Provides generated RT-Thread configuration. / 提供生成的系统配置。 |
bsp/ESP/ESP32_S3/README.md |
Documents board build and flashing. / 说明编译与烧录流程。 |
bsp/ESP/ESP32_S3/main/SConscript |
Builds the BSP application. / 构建 BSP 应用。 |
bsp/ESP/ESP32_S3/main/main.c |
Adds the default shell application. / 新增默认 Shell 应用。 |
bsp/ESP/ESP32_S3/Kconfig |
Defines BSP configuration roots. / 定义 BSP 配置入口。 |
bsp/ESP/ESP32_S3/idf_port/src/rt-thread_balance_stub.c |
Adds ESP-IDF link shims. / 新增 ESP-IDF 链接桩。 |
bsp/ESP/ESP32_S3/idf_port/src/port.c |
Adds startup-port functions. / 新增启动端口函数。 |
bsp/ESP/ESP32_S3/idf_port/src/port_common.c |
Adds common startup integration. / 新增通用启动集成。 |
bsp/ESP/ESP32_S3/idf_port/SConscript |
Builds the IDF port layer. / 构建 IDF 适配层。 |
bsp/ESP/ESP32_S3/idf_port/ld/sections.ld |
Defines section placement. / 定义段布局。 |
bsp/ESP/ESP32_S3/idf_port/ld/memory.ld |
Defines ESP32-S3 memory regions. / 定义内存区域。 |
bsp/ESP/ESP32_S3/idf_port/include/freertos/task_snapshot.h |
Supplies task snapshot declarations. / 提供任务快照声明。 |
bsp/ESP/ESP32_S3/idf_port/include/freertos/portmacro.h |
Maps FreeRTOS port APIs. / 映射 FreeRTOS 端口 API。 |
bsp/ESP/ESP32_S3/idf_port/include/freertos/FreeRTOSConfig.h |
Configures wrapper compatibility. / 配置包装层兼容性。 |
bsp/ESP/ESP32_S3/idf_port/include/freertos/FreeRTOSConfig_arch.h |
Adds Xtensa-specific settings. / 新增 Xtensa 配置。 |
bsp/ESP/ESP32_S3/idf_port/include/freertos/freertos_tasks_c_additions.h |
Supplies IDF task additions. / 提供 IDF 任务扩展。 |
bsp/ESP/ESP32_S3/idf_components/SConscript |
Selects ESP-IDF components. / 选择 ESP-IDF 组件。 |
bsp/ESP/ESP32_S3/idf_components/include_compat/bootloader_flash.h |
Adds flash API compatibility. / 新增 Flash API 兼容层。 |
bsp/ESP/ESP32_S3/idf_components/include_compat/bootloader_flash_priv.h |
Adds private flash declarations. / 新增私有 Flash 声明。 |
bsp/ESP/ESP32_S3/idf_components/include_compat/atomic_var_init.h |
Restores atomic initializer compatibility. / 恢复原子初始化兼容性。 |
bsp/ESP/ESP32_S3/builtin_imgs/.gitignore |
Whitelists flashing binaries. / 放行烧录二进制。 |
bsp/ESP/ESP32_S3/builtin_imgs/bootloader.bin |
Supplies the prebuilt bootloader. / 提供预编译 bootloader。 |
bsp/ESP/ESP32_S3/builtin_imgs/partition-table.bin |
Supplies the partition table. / 提供分区表。 |
.github/workflows/manual_trigger_update_all.yml |
Adds manual toolchain installation. / 新增手动工具链安装。 |
.github/workflows/manual_trigger_scons_except_STM32_all.yml |
Adds BSP matrix build. / 新增 BSP 矩阵构建。 |
.github/workflows/manual_dist.yml |
Adds distribution support. / 新增发布包支持。 |
.github/workflows/manual_bsp_build.yml |
Adds manual BSP builds. / 新增手动 BSP 构建。 |
.github/workflows/bsp_buildings.yml |
Adds automated toolchain setup. / 新增自动工具链配置。 |
.github/ALL_BSP_COMPILE.json |
Registers the BSP in CI. / 在 CI 中注册 BSP。 |
🧠 Review effort: Balanced
💡 Add a code-review agent skill or configure MCP servers for context-aware, tailored reviews. Learn more in the docs.
| portEXIT_CRITICAL(mux); \ | ||
| } \ | ||
| }) | ||
| #define portTRY_ENTER_CRITICAL_SAFE(mux, timeout) portENTER_CRITICAL_SAFE(mux, timeout) |
| /* This BSP services level-1 interrupts only: the tick and UART0 both | ||
| * allocate one, and its level 2-5 vectors are fatal by design. ESP-IDF's | ||
| * startup leaves sources enabled that nothing here asked for -- on this | ||
| * board two of them sit at level 4, one being ETS_LCD_CAM_INTR_SOURCE -- | ||
| * and an enabled source that is never serviced would reach a fatal vector. | ||
| * Mask everything above level 1 so that cannot happen. */ |
| | Wi-Fi | 待支持 | | | ||
| | BLE | 待支持 | | | ||
| | 板载 LED | 待支持 | | | ||
| | PSRAM | 待支持 | 8MB 未启用,堆来自片内 SRAM | |
| !bootloader.bin | ||
| !partition-table.bin |
16ecc10 to
833dfcc
Compare
Add a BSP for ESP32-S3-DevKitM-1 (ESP32-S3-MINI-1, Xtensa LX7, single core), the Xtensa context switch port in libcpu/xtensa/esp32s3, an ESP32-S3 choice in the shared ESP drivers, and CI build coverage with xtensa-esp32s3-elf GCC 12.2.0. Compatibility notes for the vendored ESP-IDF fork: - Declare bootloader_flash_wrap_set (SOC_CACHE_SUPPORT_WRAP) for both flash_qio_mode.c and flash_ops_esp32s3.c via include_compat shims. - Force-feed ATOMIC_VAR_INIT for newer toolchains. - Do not ship rtc_gpio_force_hold_all shim; the package already defines it (added with the C6 sources), so a local forwarder causes a multiple definition at link time. Tested on the board: msh, help, version, ps and free work on UART0 (TX GPIO43, RX GPIO44, 115200). The interrupt watchdog is disabled because the replacement vectors do not feed IDF's TG1 watchdog, which otherwise resets the chip about 300 ms after boot. Local CI-toolchain scons of bsp/ESP/ESP32_S3 succeeds (elf2image OK). Port notes: - The FPU (CP0) is enabled. Each level-1 interrupt saves FCR, FSR and f0-f15 eagerly, and a voluntary switch saves FCR/FSR. AI/SIMD (CP3) stays disabled. - rt_hw_stack_init() starts threads through a small trampoline that calls texit (_thread_exit) when the entry function returns. - sections.ld puts .dram1.* (DRAM_ATTR data) into .dram0.data instead of flash rodata.
833dfcc to
d976d97
Compare




拉取/合并请求描述:(PR description)
为什么提交这份PR (why to submit this PR)
主仓还没有 ESP32-S3 的 BSP。这块板是 ESP32-S3-DevKitM-1,模组 ESP32-S3-MINI-1,Xtensa LX7。它不是 RISC-V,不能用 ESP32-C3 的工具链,也不能搬 C3 的中断接法。
你的解决方案是什么 (what is your solution)
新增
bsp/ESP/ESP32_S3和libcpu/xtensa/esp32s3。本镜像单核。UART0 在开发板标着 UART 的 USB 口上,TX GPIO43,RX GPIO44,CP210x,115200。默认打开 GPIO 和 UART0。builtin_imgs里是 ESP32-S3 的 bootloader 和分区表,不能换成 ESP32-C3 的。Flash 是 DIO、8MB、80MHz。应用在0x10000。pkgs --update拉官方RT-Thread-packages/esp-idf。这份包的 SConscript 只编 ESP32-C3,S3 的源文件由idf_components/SConscript从包里挑。共享改动:
libraries/drivers/Kconfig:SoC 收进 choice,默认仍是 ESP32-C3,新增 ESP32-S3。board.c:S3 的节拍中断只加 tick,向量里已经做过 enter/leave。sdkconfig.h:S3 转去包含sdkconfig_s3.h。中断看门狗默认关掉。IDF 用自己的向量喂 TG1WDT,这份 BSP 换了向量。不关的话,启动大约 300 ms 后以
rst:0x8 (TG1WDT_SYS_RST)复位。GPIO、I2C、SPI、ADC、PWM、Wi-Fi、BLE、板载灯和片内 8MB PSRAM 都还没在板上测,README 里写的是待支持。
CI 新增 xtensa-esp32s3-elf GCC 12.2.0 工具链,本 BSP 已加入
ALL_BSP_COMPILE.json和bsp_buildings。在 ESP32-S3-DevKitM-1 上用 xtensa-esp32s3-elf GCC 12.2.0 烧过默认镜像:
msh。help、version、ps、free有回应。version是 5.3.1。ps,left tick从0x08变到0x0a。free:total 76704,used 12192,available 64512。ps里 timer 和 main 的 error 列是EINTRPT。shell 仍有回应,节拍仍在走。请提供验证的bsp和config (provide the config and bsp)
BSP:
bsp/ESP/ESP32_S3.config: 默认打开 GPIO 和 UART0。I2C、SPI、ADC、PWM、Wi-Fi、BLE 关闭。
action: CI 跑完后补上链接。
当前拉取/合并请求的状态 Intent for your PR
必须选择一项 Choose one (Mandatory):
代码质量 Code Quality:
我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:
#if 0代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up