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@@ -7,3 +7,8 @@ site: https://zolex.co/sb
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source: https://github.com/zolexlabs/superboard
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---
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Zolex Superboard -- RP2040 dev board with a built-in logic analyser, CMSIS-DAP probe and 25-LED dashboard.
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+
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+Hardware (schematic, PCB, BOM) is CERN-OHL-S-2.0. The logic analyser is MIT throughout -- wire protocol
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+and device firmware at <https://github.com/zolexlabs/superboard/tree/main/firmware>, host implementation
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+at <https://github.com/zolexlabs/superboard/tree/main/software/superboard-la>. The debug interface is
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+CMSIS-DAP, so pyOCD and OpenOCD drive it unmodified.
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